第 1 阶段 下载源码 1) 、 U-boot 源码下载地址： ftp://ftp.denx.de/pub/u-boot/ 里边的 u-boot-1.3.4.tar.bz2 文件，放到你的开发目录里； 2) 、解压文件： tar -jxvf u-boot-1.3.4.tar.bz2 ； 3) 、下载交叉编译工具 http://www.handhelds.org/download/projects/toolchain/ ，使用 3.3.2 ，如果使用 3.4.1 的编译 u-boot 会产生软件浮点的编译错误，建议使用 3.3.2 编 u-boot ，用 3.4.1 编译内核。当然你也可以使用友善之臂 http://www.arm9.net/download-arm-linux-gcc-4.3.2.asp 的 arm-linux-gcc-4.3.2.tgz ，这个 arm-linux-gcc-4.3.2 with EABI 相当不错，可以编译所有的程序；本人就是使用 4.3.2 。 4) 、建立交叉编译环境 首先： #tar xvzf arm-linux-gcc-4.3.2.tgz – C / 注意： C 后面有个空格，并且 C 是大写的，它是英文单词“ Change ”的第一个字母， 在此是改变目录的意思。 执行该命令，将把 arm-linux-gcc 安装到 /usr/loca/arm/4.3.2 目录。 然后：把编译器路径加入系统环境变量，运行命令 #vi /root/.bashrc 编辑 /root/.bashrc 文件，在最后一行 export PATH=$PATH:/usr/local/arm/4.3.2/bin ，保存退出。 最后：重新登录系统 ( 不必重启机器，开始 ->logout 即可 ) ，使以上设置生效。 第 2 阶段 测试编译环境是否正确 1 ）、在 u-boot-1.3.4/board 下找个与 2410 相似的开发板，这里 smdk2410 为例。 2 ）、将 u-boot-1.3.4/board/smdk2410 目录复制到当前目录下，并改名为 mini2440 。 3 ）、把 smdk2410.c 改名为 mini2440.c ，修改 Makefile 中的 COBJS := mini2440.o flash.o ，保存。 4 ）、将 u-boot-1.3.4/include/configs/smdk2410.h ，复制到当前目录，并改名为 mini2440.h 。 6 ）、在 u-boot-1.3.4/Makefile 中 , 大概 2490 多行找到 smdk2410_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 NULL s3c24x0 在它下边添加 mini2440_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t mini2440 NULL s3c24x0 （注意 @$(MKCONFIG) 前面必须是 TAB 键） 7 ）特别注意： 在 u-boot1.3.3 及以上版本 Makefile 有一定的变化，使得对于 24x0 处理器从 nand 启动的遇到问题。也就是网上有人说的：无法运行过 lowlevel_init 。其实这个问题是由于编译器将我们自己添加的用于 nandboot 的子函数 nand_read_ll 放到了 4K 之后造成的（到这不理解的话，请仔细看看 24x0 处理器 nandboot 原理）。 u-boot 根本没有完成自我拷贝，你可以看 uboot 根目录下的 System.map 文件就可知道原因。 解决办法其实很简单： 将 278 行的 __LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD)) 改为 __LIBS := $(subst $(obj),,$(LIBBOARD)) $(subst $(obj),,$(LIBS)) 8 ）、进入 u-boot-1.3.4 目录，先来个 #make distclean ， 然后 # make mini2440_config Configuring for mini2440 board... 9 ）、之后就可以 # make 了，如正常编译通过，表明环境搭建好。 第 3 阶段 支持 nand boot 程序修改 1 、修改 /cpu/arm920t/start.S 1) 删除 AT91RM9200 使用的 LED 代码。 #include <config.h> #include <version.h> #if defined(CONFIG_AT91RM9200DK) #include <status_led.h> /* 这是针对 AT91RM9200DK 开发板的。 */ #endif ...... /* * the actual start code */ start_code: /* * set the cpu to SVC32 mode */ mrs r0,cpsr bic r0,r0,#0x1f orr r0,r0,#0xd3 msr cpsr,r0 #if defined(CONFIG_AT91RM9200DK) bl coloured_LED_init bl red_LED_on #endif 2) 修改寄存器地址定义 #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)|| defined(CONFIG_S3C2440) /* turn off the watchdog */ #if defined(CONFIG_S3C2400) #define pWTCON 0x15300000 #define INTMSK 0x14400008 /* Interupt-Controller base addresses */ #define CLKDIVN 0x14800014 /* clock divisor register */ #else #define pWTCON 0x53000000 #define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ #define INTSUBMSK 0x4A00001C #define CLKDIVN 0x4C000014 /* clock divisor register */ #endif #define CLK_CTL_BASE 0x4C000000 #define MDIV_405 0x7f << 12 #define PSDIV_405 0x21 #define MDIV_200 0xa1 << 12 #define PSDIV_200 0x31 3) 修改中断禁止部分 #if defined(CONFIG_S3C2410) ldr r1, =0x7ff /* 根据 2410 芯片手册， INTSUBMSK 有 11 位可用 */ ldr r0, =INTSUBMSK str r1, [r0] #endif #if defined(CONFIG_S3C2440) ldr r1, =0x7fff /* 根据 2440 芯片手册， INTSUBMSK 有 15 位可用 */ ldr r0, =INTSUBMSK str r1, [r0] #endif 4) 修改时钟设置（ 2440 的主频为 405MHz 。） # if defined(CONFIG_S3C2440) /* FCLK:HCLK:PCLK = 1:4:8 */ ldr r0, =CLKDIVN mov r1, #5 str r1, [r0] mrc p15, 0, r1, c1, c0, 0 /*read ctrl register */ orr r1, r1, #0xc0000000 /*Asynchronous */ mcr p15, 0, r1, c1, c0, 0 /*write ctrl register */ /*now, CPU clock is 405.00 Mhz */ mov r1, #CLK_CTL_BASE /* */ mov r2, #MDIV_405 /* mpll_405mhz */ add r2, r2, #PSDIV_405 /* mpll_405mhz */ str r2, [r1, #0x04] /* MPLLCON */ #else /* FCLK:HCLK:PCLK = 1:2:4 */ ldr r0, =CLKDIVN mov r1, #3 str r1, [r0] mrc p15, 0, r1, c1, c0, 0 /*read ctrl register */ orr r1, r1, #0xc0000000 /*Asynchronous */ mcr p15, 0, r1, c1, c0, 0 /*write ctrl register */ /*now, CPU clock is 202.8 Mhz */ mov r1, #CLK_CTL_BASE /* */ mov r2, #MDIV_200 /* mpll_200mhz */ add r2, r2, #PSDIV_200 /* mpll_200mhz */ str r2, [r1, #0x04] # endif #endif /* CONFIG_S3C2400 || CONFIG_S3C2410|| CONFIG_S3C2440 */ 5) 将从 Nor Flash 启动改成从 NAND Flash 启动。 在以下 U － Boot 的重定向语句段 ( 作用是将 u-boot 的源代码从 nor flash 到 sdram 中 ) ： （你完全可以把下面的 nor flash 重定向语句全部干掉） #ifndef CONFIG_AT91RM9200 #ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ cmp r0, r1 /* don't reloc during debug */ beq stack_setup ldr r2, _armboot_start ldr r3, _bss_start sub r2, r3, r2 /* r2 <- size of armboot */ add r2, r0, r2 /* r2 <- source end address*/ copy_loop: ldmia {r3-r10} /* copy from source address [r0] */ stmia {r3-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end addreee [r2] */ ble copy_loop #endif /* CONFIG_SKIP_RELOCATE_UBOOT */ #endif 的前面添加上以下的 nand boot 代码： #ifdef CONFIG_S3C2440_NAND_BOOT #define NAND_CTL_BASE 0x4E000000 /* Offset */ #define oNFCONF 0x00 #define oNFCONT 0x04 #define oNFCMD 0x08 #define oNFSTAT 0x20 #define LENGTH_UBOOT 0x40000 @ reset NAND mov r1, #NAND_CTL_BASE ldr r2, =( (7<<12)|(7<<8)|(7<<4)|(0<<0) ) str r2, [r1, #oNFCONF] ldr r2, [r1, #oNFCONF] ldr r2, =( (1<<4)|(0<<1)|(1<<0) ) @ Active low CE Control str r2, [r1, #oNFCONT] ldr r2, [r1, #oNFCONT] ldr r2, =(0x6) @ RnB Clear str r2, [r1, #oNFSTAT] ldr r2, [r1, #oNFSTAT] mov r2, #0xff @ RESET command strb r2, [r1, #oNFCMD] mov r3, #0 @ wait nand1: add r3, r3, #0x1 cmp r3, #0xa blt nand1 nand2: ldr r2, [r1, #oNFSTAT] @ wait ready tst r2, #0x4 beq nand2 ldr r2, [r1, #oNFCONT] orr r2, r2, #0x2 @ Flash Memory Chip Disable str r2, [r1, #oNFCONT] @ get read to call C functions (for nand_read()) ldr sp, DW_STACK_START @ setup stack pointer mov fp, #0 @ no previous frame, so fp=0 @ copy U-Boot to RAM ldr r0, =TEXT_BASE mov r1, #0x0 mov r2, #LENGTH_UBOOT bl nand_read_ll tst r0, #0x0 beq ok_nand_read bad_nand_read: loop2: b loop2 @ infinite loop ok_nand_read: @ verify mov r0, #0 ldr r1, =TEXT_BASE mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes go_next: ldr r3, [r0], #4 ldr r4, [r1], #4 teq r3, r4 bne notmatch subs r2, r2, #4 beq stack_setup bne go_next notmatch: loop3: b loop3 @ infinite loop #endif #ifdef CONFIG_S3C2410_NAND_BOOT #define NAND_CTL_BASE 0x4E000000 /* Offset */ #define oNFCONF 0x00 #define oNFCMD 0x04 #define oNFSTAT 0x10 #define LENGTH_UBOOT 0x40000 @ reset NAND mov r1, #NAND_CTL_BASE ldr r2, =0xf830 @ initial value str r2, [r1, #oNFCONF] ldr r2, [r1, #oNFCONF] bic r2, r2, #0x800 @ enable chip str r2, [r1, #oNFCONF] mov r2, #0xff @ RESET command strb r2, [r1, #oNFCMD] mov r3, #0 @ wait nand1: add r3, r3, #0x1 cmp r3, #0xa blt nand1 nand2: ldr r2, [r1, #oNFSTAT] @ wait ready tst r2, #0x1 beq nand2 ldr r2, [r1, #oNFCONF] orr r2, r2, #0x800 @ disable chip str r2, [r1, #oNFCONF] @ get read to call C functions (for nand_read()) ldr sp, DW_STACK_START @ setup stack pointer mov fp, #0 @ no previous frame, so fp=0 @ copy U-Boot to RAM ldr r0, =TEXT_BASE mov r1, #0x0 mov r2, #LENGTH_UBOOT bl nand_read_ll tst r0, #0x0 beq ok_nand_read bad_nand_read: loop2: b loop2 @ infinite loop ok_nand_read: @ verify mov r0, #0 ldr r1, =TEXT_BASE mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes go_next: ldr r3, [r0], #4 ldr r4, [r1], #4 teq r3, r4 bne notmatch subs r2, r2, #4 beq stack_setup bne go_next notmatch: loop3: b loop3 @ infinite loop #endif 在 “ _start_armboot: .word start_armboot ” 后加入： #define STACK_BASE 0x33f00000 #define STACK_SIZE 0x10000 .align 2 DW_STACK_START: .word STACK_BASE+STACK_SIZE-4 2 、 在 board/mini2440 加入 NAND Flash 读取函数（ start.S 中需要的 nand_read_ll 函数）文件 nand_read.c ================================================================== #include <config.h> #include <linux/mtd/nand.h> #define __REGb(x) (*(volatile unsigned char *)(x)) #define __REGw(x) (*(volatile unsigned short *)(x)) #define __REGi(x) (*(volatile unsigned int *)(x)) #define NF_BASE 0x4e000000 #if defined(CONFIG_S3C2410) #define NFCONF __REGi(NF_BASE + 0x0) #define NFCMD __REGb(NF_BASE + 0x4) #define NFADDR __REGb(NF_BASE + 0x8) #define NFDATA __REGb(NF_BASE + 0xc) #define NFSTAT __REGb(NF_BASE + 0x10) #define NFSTAT_BUSY 1 #define nand_select() (NFCONF &= ~0x800) #define nand_deselect() (NFCONF |= 0x800) #define nand_clear_RnB() do {} while (0) #elif defined(CONFIG_S3C2440) #define NFCONF __REGi(NF_BASE + 0x0) #define NFCONT __REGi(NF_BASE + 0x4) #define NFCMD __REGb(NF_BASE + 0x8) #define NFADDR __REGb(NF_BASE + 0xc) #define NFDATA __REGb(NF_BASE + 0x10) #define NFDATA16 __REGw(NF_BASE + 0x10) #define NFSTAT __REGb(NF_BASE + 0x20) #define NFSTAT_BUSY (1 << 2) #define nand_select() (NFCONT &= ~(1 << 1)) #define nand_deselect() (NFCONT |= (1 << 1)) #define nand_clear_RnB() (NFSTAT |= NFSTAT_BUSY) #endif static inline void nand_wait(void) { int i; while (!(NFSTAT & NFSTAT_BUSY)) for (i=0; i<10; i++); } #if defined(CONFIG_S3C2410) /* configuration for 2410 with 512byte sized flash */ #define NAND_PAGE_SIZE 512 #define BAD_BLOCK_OFFSET 517 #define NAND_BLOCK_MASK (NAND_PAGE_SIZE - 1) #define NAND_BLOCK_SIZE 0x4000 #else /* configuration for 2440 with 2048byte sized flash */ #define NAND_5_ADDR_CYCLE #define NAND_PAGE_SIZE 2048 #define BAD_BLOCK_OFFSET NAND_PAGE_SIZE #define NAND_BLOCK_MASK (NAND_PAGE_SIZE - 1) #define NAND_BLOCK_SIZE (NAND_PAGE_SIZE * 64) #endif /* compile time failure in case of an invalid configuration */ #if defined(CONFIG_S3C2410) && (NAND_PAGE_SIZE != 512) #error "S3C2410 does not support nand page size != 512" #endif static int is_bad_block(unsigned long i) { unsigned char data; unsigned long page_num; /* FIXME: do this twice, for first and second page in block */ nand_clear_RnB(); #if (NAND_PAGE_SIZE == 512) NFCMD = NAND_CMD_READOOB; /* 0x50 */ NFADDR = BAD_BLOCK_OFFSET & 0xf; NFADDR = (i >> 9) & 0xff; NFADDR = (i >> 17) & 0xff; NFADDR = (i >> 25) & 0xff; #elif (NAND_PAGE_SIZE == 2048) page_num = i >> 11; /* addr / 2048 */ NFCMD = NAND_CMD_READ0; NFADDR = BAD_BLOCK_OFFSET & 0xff; NFADDR = (BAD_BLOCK_OFFSET >> 8) & 0xff; NFADDR = page_num & 0xff; NFADDR = (page_num >> 8) & 0xff; NFADDR = (page_num >> 16) & 0xff; NFCMD = NAND_CMD_READSTART; #endif nand_wait(); data = (NFDATA & 0xff); if (data != 0xff) return 1; return 0; } static int nand_read_page_ll(unsigned char *buf, unsigned long addr) { unsigned short *ptr16 = (unsigned short *)buf; unsigned int i, page_num; nand_clear_RnB(); NFCMD = NAND_CMD_READ0; #if (NAND_PAGE_SIZE == 512) /* Write Address */ NFADDR = addr & 0xff; NFADDR = (addr >> 9) & 0xff; NFADDR = (addr >> 17) & 0xff; NFADDR = (addr >> 25) & 0xff; #elif (NAND_PAGE_SIZE == 2048) page_num = addr >> 11; /* addr / 2048 */ /* Write Address */ NFADDR = 0; NFADDR = 0; NFADDR = page_num & 0xff; NFADDR = (page_num >> 8) & 0xff; NFADDR = (page_num >> 16) & 0xff; NFCMD = NAND_CMD_READSTART; #else #error "unsupported nand page size" #endif nand_wait(); for (i = 0; i < NAND_PAGE_SIZE; i++) { *buf = (NFDATA & 0xff); buf++; } return NAND_PAGE_SIZE; } /* low level nand read function */ int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size) { int i, j; if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) { return -1; /* invalid alignment */ } /* chip Enable */ nand_select(); nand_clear_RnB(); for (i=0; i<10; i++); for (i=start_addr; i < (start_addr + size);) { j = nand_read_page_ll(buf, i); i += j; buf += j; } /* chip Disable */ nand_deselect(); return 0; } ============================================================== 记得修改 board/mini2440/Makefile 文件 , 将 nand_read.c 编译进 u-boot 。 OBJS := mini2440.o nand_read.o flash.o 3 、修改 board/mini2440/lowlevel_init.S 文件 /* REFRESH parameter */ #define REFEN 0x1 /* Refresh enable */ #define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ #define Trc 0x3 /* 7clk */ #define Tchr 0x2 /* 3clk */ #if defined(CONFIG_S3C2440) #define Trp 0x2 /* 4clk */ #define REFCNT 1012 #else #define Trp 0x0 /* 2clk */ #define REFCNT 0x0459 #endif 4 、 修改 /board/mini2440/mini2440.c 修改其对 GPIO 和 PLL 的配置 ( 请参阅开发板的硬件说明和芯片手册 ) ；并针对 LCD 显示部分和 nand flash 驱动添加相应的代码： ...... #include <common.h> #include <s3c2410.h> #include <video_fb.h> #if defined(CONFIG_CMD_NAND) #include <linux/mtd/nand.h> #endif DECLARE_GLOBAL_DATA_PTR; #define FCLK_SPEED 1 #if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */ #define M_MDIV 0xC3 #define M_PDIV 0x4 #define M_SDIV 0x1 #elif FCLK_SPEED==1 /* Fout = 202.8MHz */ #if defined(CONFIG_S3C2410) /* Fout = 202.8MHz */ #define M_MDIV 0xA1 #define M_PDIV 0x3 #define M_SDIV 0x1 #endif #if defined(CONFIG_S3C2440) /* Fout = 405MHz */ #define M_MDIV 0x7f #define M_PDIV 0x2 #define M_SDIV 0x1 #endif #endif #define USB_CLOCK 1 #if USB_CLOCK==0 #define U_M_MDIV 0xA1 #define U_M_PDIV 0x3 #define U_M_SDIV 0x1 #elif USB_CLOCK==1 #if defined(CONFIG_S3C2410) #define U_M_MDIV 0x48 #define U_M_PDIV 0x3 #endif #if defined(CONFIG_S3C2440) #define U_M_MDIV 0x38 #define U_M_PDIV 0x2 #endif #define U_M_SDIV 0x2 #endif ...... 为连接 LED 和蜂鸣器的 GPIO 修改配置寄存器： int board_init (void): ...... #if defined(CONFIG_MINI2440) gpio->GPBCON = 0x00295551; #else gpio->GPBCON = 0x00044556; #endif ...... 为引导 linux 内核，修改开发板的类型代码： int board_init (void): ...... #if defined(CONFIG_S3C2410) /* arch number of SMDK2410-Board */ gd->bd->bi_arch_number = MACH_TYPE_SMDK2410; #endif #if defined(CONFIG_S3C2440) /* arch number of S3C2440-Board */ gd->bd->bi_arch_number = MACH_TYPE_S3C2440 ; #endif ...... 为使 int board_init (void) 设置完成后， LED1 和 LED2 同时亮起，蜂鸣器继续鸣叫，在 int board_init (void) 的最后添加： ...... icache_enable(); dcache_enable(); #if defined(CONFIG_MINI2440_LED) gpio->GPBDAT = 0x00000181; #endif return 0; } 5、最后，修改 board/mini2440/u-boot.lds 文件，在 cpu/arm920t/start.o (.text) 后加上 board/2440/lowlevel_init.o (.text) board/2440/nand_read.o (.text) 第 4 阶段 修改适合 S3C2440 的程序 1) 、修改 include/configs/2440.h 将 #define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */ 改为： #define CONFIG_S3C2440 2 ）、将 /include/common.h 中的 #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_LH7A40X) 改为： #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_LH7A40X) || defined(CONFIG_S3C2440) 3 ）、修改 /include/s3c24x0.h ，将文件中所有的 #ifdef CONFIG_S3C2410 改为： #if defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440) 还有nand 的处理： /* NAND FLASH (see S3C2410 manual chapter 6) */ typedef struct { S3C24X0_REG32 NFCONF; #if defined(CONFIG_S3C2440) //modified for 2440 S3C24X0_REG32 NFCONT; #endif S3C24X0_REG32 NFCMD; S3C24X0_REG32 NFADDR; S3C24X0_REG32 NFDATA; S3C24X0_REG32 NFSTAT; S3C24X0_REG32 NFECC; } /*__attribute__((__packed__))*/ S3C2410_NAND; 4 ）、将 /cpu/arm920t/s3c24x0/interrupts.c 中的 #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) 修改为： #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) || defined (CONFIG_S3C2440) 将 #elif defined(CONFIG_S3C2410) 改为： #elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440) 5 ）、将 /cpu/arm920t/s3c24x0/serial.c 文件中的 #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) 改为： #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) || defined (CONFIG_S3C2440) 将 #elif defined(CONFIG_S3C2410) 改为： #elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440) 将函数 static int serial_init_dev(const int dev_index) 中的 uart->UFCON = 0x07; 改为： uart->UFCON = 0x00; 6 ）、将 /cpu/arm920t/s3c24x0/speed.c 中的 #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) 改为： #if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) || defined (CONFIG_S3C2440) 将 #elif defined(CONFIG_S3C2410) 改为： #elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440) 在 static ulong get_PLLCLK(int pllreg) 中的 m = ((r & 0xFF000) >> 12) + 8; p = ((r & 0x003F0) >> 4) + 2; s = r & 0x3; 后面加上： #if defined(CONFIG_S3C2440) if (pllreg == MPLL) return((CONFIG_SYS_CLK_FREQ * m * 2) / (p << s)); else if (pllreg == UPLL) #endif 将 /* return HCLK frequency */ ulong get_HCLK(void) { S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK()); } 改为： /* return HCLK frequency */ ulong get_HCLK(void) { S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); if (clk_power->CLKDIVN & 0x6) { if ((clk_power->CLKDIVN & 0x6)==2) return(get_FCLK()/2); if ((clk_power->CLKDIVN & 0x6)==6) return((clk_power->CAMDIVN & 0x100) ? get_FCLK()/6 : get_FCLK()/3); if ((clk_power->CLKDIVN & 0x6)==4) return((clk_power->CAMDIVN & 0x200) ? get_FCLK()/8 : get_FCLK()/4); return(get_FCLK()); } else return(get_FCLK()); } 7 ）、 /cpu/arm920t/s3c24x0/usb_ohci.c 中的 #elif defined(CONFIG_S3C2410) 改为： #elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440) 8 ）、将 drivers/rtc/s3c24x0_rtc.c 中的 #elif defined(CONFIG_S3C2410) 改为： #elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440) 9 ）、需要在 /include/s3c24x0.h 文件中添加 CAMDIVN 定义，将 /* CLOCK & POWER MANAGEMENT (see S3C2400 manual chapter 6) */ /* (see S3C2410 manual chapter 7) */ typedef struct { S3C24X0_REG32 LOCKTIME; S3C24X0_REG32 MPLLCON; S3C24X0_REG32 UPLLCON; S3C24X0_REG32 CLKCON; S3C24X0_REG32 CLKSLOW; S3C24X0_REG32 CLKDIVN; } /*__attribute__((__packed__))*/ S3C24X0_CLOCK_POWER; 改为： /* CLOCK & POWER MANAGEMENT (see S3C2400 manual chapter 6) */ /* (see S3C2410 manual chapter 7) */ typedef struct { S3C24X0_REG32 LOCKTIME; S3C24X0_REG32 MPLLCON; S3C24X0_REG32 UPLLCON; S3C24X0_REG32 CLKCON; S3C24X0_REG32 CLKSLOW; S3C24X0_REG32 CLKDIVN; #if defined (CONFIG_S3C2440) S3C24X0_REG32 CAMDIVN; #endif } /*__attribute__((__packed__))*/ S3C24X0_CLOCK_POWER; 到这里， make 一下，把 u-boot.bin 烧到 nand flash ，重新启动，在串口工具上应该可以看到熟悉的 U-Boot 1.3.4 (Oct 9 2009 - 07:34:33) DRAM: 64 MB NAND: 第 5 阶段 修改 nand和支持网口芯片DM9000 等的驱动 1）对cpu/arm920t/s3c24x0里的nand.c进行如下修改： #include <common.h> #if 0 #define DEBUGN printf #else #define DEBUGN(x, args ...) {} #endif #if defined(CONFIG_CMD_NAND) #if !defined(CFG_NAND_LEGACY) #include <nand.h> #include <s3c2410.h> #define __REGb(x) (*(volatile unsigned char *)(x)) #define __REGi(x) (*(volatile unsigned int *)(x)) #define NF_BASE 0x4e000000 #if defined(CONFIG_S3C2410) #define NFCONF __REGi(NF_BASE + 0x0) #define NFCMD __REGb(NF_BASE + 0x4) #define NFADDR __REGb(NF_BASE + 0x8) #define NFDATA __REGb(NF_BASE + 0xc) #define NFSTAT __REGb(NF_BASE + 0x10) #define NFECC0 __REGb(NF_BASE + 0x14) #define NFECC1 __REGb(NF_BASE + 0x15) #define NFECC2 __REGb(NF_BASE + 0x16) #define S3C2410_NFCONF_EN (1<<15) #define S3C2410_NFCONF_512BYTE (1<<14) #define S3C2410_NFCONF_4STEP (1<<13) #define S3C2410_NFCONF_INITECC (1<<12) #define S3C2410_NFCONF_nFCE (1<<11) #define S3C2410_NFCONF_TACLS(x) ((x)<<8) #define S3C2410_NFCONF_TWRPH0(x) ((x)<<4) #define S3C2410_NFCONF_TWRPH1(x) ((x)<<0) #elif defined(CONFIG_S3C2440) #define NFCONF __REGi(NF_BASE + 0x0) #define NFCONT __REGi(NF_BASE + 0x4) #define NFCMD __REGb(NF_BASE + 0x8) #define NFADDR __REGb(NF_BASE + 0xc) #define NFDATA __REGb(NF_BASE + 0x10) #define NFMECCD0 __REGi(NF_BASE + 0x14) #define NFMECCD1 __REGi(NF_BASE + 0x18) #define NFSECCD __REGi(NF_BASE + 0x1C) #define NFSTAT __REGb(NF_BASE + 0x20) #define NFSTAT0 __REGi(NF_BASE + 0x24) #define NFSTAT1 __REGi(NF_BASE + 0x28) #define NFMECC0 __REGi(NF_BASE + 0x2C) #define NFMECC1 __REGi(NF_BASE + 0x30) #define NFSECC __REGi(NF_BASE + 0x34) #define NFSBLK __REGi(NF_BASE + 0x38) #define NFEBLK __REGi(NF_BASE + 0x3c) #define S3C2440_NFCONT_nCE (1<<1) #define S3C2440_ADDR_NALE 0x0c #define S3C2440_ADDR_NCLE 0x08 #endif static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd) { struct nand_chip *chip = mtd->priv; DEBUGN("hwcontrol(): 0xx: ", cmd); #if defined(CONFIG_S3C2410) switch (cmd) { case NAND_CTL_SETNCE: NFCONF &= ~S3C2410_NFCONF_nFCE; DEBUGN("NFCONF=0xx/n", NFCONF); break; case NAND_CTL_CLRNCE: NFCONF |= S3C2410_NFCONF_nFCE; DEBUGN("NFCONF=0xx/n", NFCONF); break; case NAND_CTL_SETALE: chip->IO_ADDR_W = NF_BASE + 0x8; DEBUGN("SETALE/n"); break; case NAND_CTL_SETCLE: chip->IO_ADDR_W = NF_BASE + 0x4; DEBUGN("SETCLE/n"); break; default: chip->IO_ADDR_W = NF_BASE + 0xc; break; } #elif defined(CONFIG_S3C2440) switch (cmd) { case NAND_CTL_SETNCE: NFCONF &= ~S3C2440_NFCONT_nCE; DEBUGN("NFCONF=0xx/n", NFCONF); break; case NAND_CTL_CLRNCE: NFCONF |= S3C2440_NFCONT_nCE; DEBUGN("NFCONF=0xx/n", NFCONF); break; case NAND_CTL_SETALE: chip->IO_ADDR_W = NF_BASE + S3C2440_ADDR_NALE; DEBUGN("SETALE/n"); break; case NAND_CTL_SETCLE: chip->IO_ADDR_W = NF_BASE + S3C2440_ADDR_NCLE; DEBUGN("SETCLE/n"); break; default: chip->IO_ADDR_W = NF_BASE + 0x10; //注意是0x10 break; } #endif return; } static int s3c2410_dev_ready(struct mtd_info *mtd) { DEBUGN("dev_ready/n"); return (NFSTAT & 0x01); } #ifdef CONFIG_S3C2410_NAND_HWECC void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) { DEBUGN("s3c2410_nand_enable_hwecc(%p, %d)/n", mtd ,mode); NFCONF |= S3C2410_NFCONF_INITECC; } static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) { ecc_code[0] = NFECC0; ecc_code[1] = NFECC1; ecc_code[2] = NFECC2; DEBUGN("s3c2410_nand_calculate_hwecc(%p,): 0xx 0xx 0xx/n", mtd , ecc_code[0], ecc_code[1], ecc_code[2]); return 0; } static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc) { if (read_ecc[0] == calc_ecc[0] && read_ecc[1] == calc_ecc[1] && read_ecc[2] == calc_ecc[2]) return 0; printf("s3c2410_nand_correct_data: not implemented/n"); return -1; } #endif int board_nand_init(struct nand_chip *nand) { u_int32_t cfg; u_int8_t tacls, twrph0, twrph1; S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); DEBUGN("board_nand_init()/n"); clk_power->CLKCON |= (1 << 4); #if defined(CONFIG_S3C2410) /* initialize hardware */ twrph0 = 3; twrph1 = 0; tacls = 0; cfg = S3C2410_NFCONF_EN; cfg |= S3C2410_NFCONF_TACLS(tacls - 1); cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); NFCONF = cfg; /* initialize nand_chip data structure */ nand->IO_ADDR_R = nand->IO_ADDR_W = 0x4e00000c; /* read_buf and write_buf are default */ /* read_byte and write_byte are default */ /* hwcontrol always must be implemented */ nand->hwcontrol = s3c2410_hwcontrol; nand->dev_ready = s3c2410_dev_ready; #ifdef CONFIG_S3C2410_NAND_HWECC nand->enable_hwecc = s3c2410_nand_enable_hwecc; nand->calculate_ecc = s3c2410_nand_calculate_ecc; nand->correct_data = s3c2410_nand_correct_data; nand->eccmode = NAND_ECC_HW3_512; #else //nand->eccmode = NAND_ECC_SOFT; nand->eccmode = NAND_ECC_NONE; /*这个ECC先去掉，否则你使用nand write命令和nand read会boot 不起内核*/ #endif #ifdef CONFIG_S3C2410_NAND_BBT nand->options = NAND_USE_FLASH_BBT; #else nand->options = 0; #endif #elif defined(CONFIG_S3C2440) twrph0 = 6; twrph1 = 2; tacls = 0; cfg = (tacls<<12)|(twrph0<<8)|(twrph1<<4); NFCONF = cfg; cfg = (1<<6)|(1<<4)|(0<<1)|(1<<0); NFCONT = cfg; /* initialize nand_chip data structure */ nand->IO_ADDR_R = nand->IO_ADDR_W = (void *)0x4e000010; /* read_buf and write_buf are default */ /* read_byte and write_byte are default */ /* hwcontrol always must be implemented */ nand->hwcontrol = s3c2410_hwcontrol; nand->dev_ready = s3c2410_dev_ready; #ifdef CONFIG_S3C2440_NAND_HWECC nand->enable_hwecc = s3c2410_nand_enable_hwecc; nand->calculate_ecc = s3c2410_nand_calculate_ecc; nand->correct_data = s3c2410_nand_correct_data; nand->eccmode = NAND_ECC_HW3_512; #else // nand->eccmode = NAND_ECC_SOFT; nand->eccmode = NAND_ECC_NONE; /*这个ECC先去掉，否则你使用nand write命令和nand read会boot 不起内核*/ #endif #ifdef CONFIG_S3C2440_NAND_BBT nand->options = NAND_USE_FLASH_BBT; #else nand->options = 0; #endif #endif DEBUGN("end of nand_init/n"); return 0; } #else #error "U-Boot legacy NAND support not available for S3C2410" #endif #endif 2）对include/configs、mini2440.h进行如下修改： 增加 #define CONFIG_CMD_NAND /* NAND support */ #define CFG_ENV_IS_IN_NAND 1 /* */ #define CFG_ENV_OFFSET 0X40000 /* u-boot:0x00000--0x40000,param:0x40000--0x60000,kernel:0x60000--0x260000 128K block*/ #define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ //#define CONFIG_SETUP_MEMORY_TAGS 1 //#define CONFIG_CMDLINE_TAG 1 /*nand flash define*/ #if defined(CONFIG_CMD_NAND) #define CFG_MAX_NAND_DEVICE 1 //just one nand flash chip on board #define CFG_NAND_BASE 0x4e000000 //nand flash base address #define SECTORSIZE 2048 /* one page size*/ #define NAND_SECTOR_SIZE SECTORSIZE #define NAND_BLOCK_MASK (SECTORSIZE - 1) /* * Nandflash Boot */ #define CONFIG_S3C2440_NAND_BOOT 1 #endif 3）增加对网口芯片的支持： 同在mini2440.h里，修改Hardware drivers的定义： /* * Hardware drivers */ //#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ //#define CS8900_BASE 0x19000300 //#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */ #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x20000300 #define DM9000_IO CONFIG_DM9000_BASE #define DM9000_DATA (CONFIG_DM9000_BASE+4) #define CONFIG_DM9000_USE_16BIT 并确保#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */打开，设置相关TFTP操作的定义，如下： #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200n81" #define CONFIG_ETHADDR 08:00:3e:26:0a:5b #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_IPADDR 192.168.1.250 #define CONFIG_SERVERIP 192.168.1.100 #define CONFIG_BOOTFILE "zImage.img" /*#define CONFIG_BOOTCOMMAND "tftp; bootm"*/ #define CONFIG_BOOTCOMMAND "tftp 0x30008000 zImage.img/; bootm 30008000" 到这里，make一下，你可以把zImage通过TFTP给BOOT 起来了。 注意zImage必须使用u-boot-1.3.4/toolsl里的mkimage加上文件头才能被u-boot boot起来，本人写了一个sh文件： #!/bin/sh mkimage -n 'linux-2.6.31' -A arm -O linux -T kernel -C none -a 0x30008000 -e 0x30008040 -d zImage zImage.img #================================================= （未完，待续）
